[Federal Register Volume 89, Number 22 (Thursday, February 1, 2024)]
[Notices]
[Pages 6508-6509]
From the Federal Register Online via the Government Publishing Office [www.gpo.gov]
[FR Doc No: 2024-02026]


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DEPARTMENT OF COMMERCE

National Institute of Standards and Technology


CHIPS National Advanced Packaging Manufacturing Program (NAPMP) 
Materials and Substrates Research and Development

AGENCY: National Institute of Standards and Technology, Department of 
Commerce.

ACTION: Notice of Intent (NOI).

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SUMMARY: The CHIPS Research and Development Office (CHIPS R&D) intends 
to announce, via a Notice of Funding Opportunity (NOFO), an open 
competition for new research and development (R&D) activities to 
establish and accelerate domestic capacity for advanced packaging 
substrates and substrate materials, a key technology for manufacturing 
semiconductors. CHIPS R&D anticipates making available up to 
approximately $300,000,000 for multiple awards in amounts up to 
approximately $100,000,000 per award, not including voluntary co-
investment, over up to 5 years and made through cooperative agreements 
or other transactions. The purpose of this NOI is to offer preliminary 
information to potential applicants, facilitating the development of 
meaningful partnerships and strong, responsive proposals.

FOR FURTHER INFORMATION CONTACT: All inquiries may be directed to Chris 
Greer (301-975-2000) via email to [email protected], with a subject 
line stating: `2024-NIST-CHIPS-NAPMP-01 Questions.' All answers, which 
will be provided at the sole discretion of CHIPS R&D, will be posted on 
the NIST competition website at https://www.nist.gov/chips/chips-RD-funding-opportunities.

SUPPLEMENTARY INFORMATION: 
    Purpose. The CHIPS Research and Development Office (CHIPS R&D) 
intends to announce, via a Notice of Funding Opportunity (NOFO), an 
open competition for new research and development (R&D) activities to 
establish and accelerate domestic capacity for advanced packaging 
substrates and substrate materials, a key technology for manufacturing 
semiconductors. CHIPS R&D anticipates making available up to 
approximately $300,000,000 for multiple awards in amounts up to 
approximately $100,000,000 per award, not including voluntary co-
investment, over up to 5 years and made through cooperative agreements 
or other transactions. Co-investment (cost share) is not required in 
this program. CHIPS R&D will, however, give preference to applications 
that demonstrate committed co-investment in their application.
    The purpose of this NOI is to offer preliminary information to 
potential applicants, facilitating the development of meaningful 
partnerships and strong, responsive proposals. CHIPS R&D intends to 
announce the competition no later than March 2024 by posting the NOFO 
on Grants.gov at https://www.grants.gov. More information about the 
expected CHIPS R&D NAPMP Materials and Substrates competition will then 
be available at the CHIPS for America website at https://www.nist.gov/chips/chips-RD-funding-opportunities.
    Background. Emerging technologies like artificial intelligence, 
advanced telecommunications, biomedical devices, and autonomous 
vehicles require leap-ahead advances in microelectronics capabilities. 
Improving all aspects of system performance to support the breadth of 
new semiconductor applications will require advanced packaging and 
related capabilities, such as heterogeneous integration, to address the 
need to integrate multi-component-assemblies with large numbers of 
interconnects to achieve a degree of integration that blurs the line 
between chip and package.
    In particular, the ability to ``scale-down and scale-out'' will be 
critical, where ``scale-down'' refers to shrinking the size of the 
features on the package and ``scale-out'' refers to increasing the 
number of chips assembled on the substrate.
    Materials and substrates are foundational to achieving the 
necessary advancements. Moreover, materials and substrates R&D, 
particularly applied R&D, is critical to expanding the U.S. packaging 
ecosystem.
    CHIPS R&D Mission and Goals: The CHIPS and Science Act appropriated 
approximately $50 billion to the Department of Commerce--$39 billion in 
incentives to onshore semiconductor manufacturing and $11 billion to 
advance U.S. leadership in semiconductor R&D. Within CHIPS for America, 
the mission of CHIPS R&D is to accelerate the development and 
commercial deployment of foundational semiconductor technologies by 
establishing, connecting, and providing access to domestic research 
efforts, tools, resources, workers, and facilities. NAPMP, one of 
multiple CHIPS R&D initiatives, seeks to drive U.S. leadership in 
advanced packaging and provide the technology and skilled workforce 
needed for packaging manufacturing in the United States.
    Within a decade, NAPMP-funded activities, coupled with CHIPS 
manufacturing incentives, will establish a vibrant, self-sustaining, 
profitable, onshore packaging industry where advanced node chips 
manufactured in the United States and abroad can be packaged in 
appropriate volumes within the United States and innovative designs and 
architectures are enabled through leading-edge packaging capabilities. 
In combination with other CHIPS for America education and workforce 
efforts, NAPMP-funded activities produce the diverse and capable 
workforce needed for the success of the domestic packaging sector.
    Materials and Substrates NOFO Objectives: Three major R&D areas 
have the potential to make a significant impact on domestic advanced 
packaging capabilities: organic materials and substrates (including 
fan-out); glass materials and substrates; and semiconductor-based 
substrates. Within these areas, CHIPS R&D intends to fund R&D 
activities that establish and promote relevant domestic capability and 
capacity, with the following objectives:
    1. Accelerate domestic R&D and innovation in advanced packaging 
materials and substrates;
    2. Transition domestic materials and substrate innovation into U.S. 
manufacturing, such that these technologies are available to U.S. 
manufacturers and customers, including to significantly benefit U.S. 
economic and national security;

[[Page 6509]]

    3. Support the establishment of a robust, sustainable, domestic 
capacity for advanced packaging materials and substrate R&D, 
prototyping, commercialization, and manufacturing; and
    4. Promote a skilled and diverse pipeline of workers for a 
sustainable domestic advanced packaging industry.
    Funded activities are expected to include, but not necessarily be 
limited to, basic and applied research, substrate and demonstration 
device development and production, commercial viability and domestic 
manufacturing preparation, integrated workforce education and training, 
and pilot-level substrate production.
    To ensure that funded R&D meets the above objectives, CHIPS R&D 
expects to define aggressive technical targets (e.g., substrate wiring, 
via pitches, and number of levels on both sides of the substrate) for 
applicants to achieve. CHIPS R&D will also encourage proposals for 
advanced substrates that incorporate one or more passive or active 
components embedded in the substrate for enhanced functionality. 
Whereas traditional boards, silicon or glass interposers and small area 
substrates are not expected to be in scope for this NOFO, composite 
substrates using fan-out wafer-level packaging, including flexible and 
biocompatible substrates, are expected to be entertained. CHIPS R&D 
will further expect that substrates be compatible with direct attach at 
fine pitch of advanced node CMOS, legacy nodes, and non-silicon 
dielets. Substrate proposals will be strongly encouraged to incorporate 
embedded substrate features and active and passive devices and through 
substrate vias. CHIPS R&D will further expect applicants to define non-
technical targets related to advanced packaging education and workforce 
development and to demonstrating both the commercial viability and the 
potential for the domestic production of innovations funded under the 
NOFO.
    Eligibility: CHIPS R&D expects eligible applicants and 
subrecipients will include for-profit organizations; non-profit 
organizations; accredited institutions of higher education including 
community and technical colleges; state, local, territorial, and Indian 
tribal governments.
    Applicants must be incorporated in the United States (including 
U.S. territories). Eligible applicants may only submit one concept 
paper and one full application under this NOFO. Full applications will 
only be accepted from applicants invited after the concept paper stage. 
Entities may not be included as subrecipients on more than two 
applications.
    Entities that operate Federally Funded Research and Development 
Centers (FFRDCs) may be eligible to receive this funding as sub-
subrecipients to an eligible applicant to the extent allowed by law, 
based on the unique and specific needs of the project.
    Foreign organizations may participate as members of a project team, 
as sub-subrecipients or contractors, subject to CHIPS R&D approval 
based on a written justification that the foreign partner's involvement 
is essential to advancing program objectives, among other 
considerations.
    R&D Collaboration: CHIPS R&D expects that applicants assembling 
teams comprising one or more subrecipients may be best suited to 
collectively provide the full range of expertise and capabilities 
needed to achieve the program objectives and to successfully strengthen 
U.S. materials and substrates innovation. Equally important, these 
types of partnerships can promote inventiveness, clarify future demand, 
improve transparency and security, solidify business and domestic 
manufacturing plans (including plans for technology adoption by defense 
and commercial partners), help educate the future workforce, mitigate 
the risk of future chip shortages or oversupply, and support a more 
productive, efficient, and self-sustaining semiconductor ecosystem.
    CHIPS R&D therefore encourages applications that demonstrate 
collaboration across the innovation, manufacturing, supply chain, and 
customer landscape.
    Application Process and Award Information: The envisioned 
application process consists of a mandatory concept paper and a 
required full application. CHIPS R&D anticipates a due date for concept 
papers of approximately 35 days after the date of NOFO publication. 
Full applications will only be accepted from applicants invited to 
apply after the concept paper stage. Submissions from entities other 
than those specifically invited to submit a full application will not 
be reviewed or considered in any way.
    To provide the public with an opportunity to learn more about the 
NOFO before the concept paper deadline, CHIPS R&D expects to host a 
Proposers Day after NOFO release to familiarize potential applicants 
with the NOFO objectives and program structure. CHIPS R&D will announce 
details regarding the date and location of the Proposers Day via the 
CHIPS R&D website at https://www.nist.gov/chips/chips-RD-funding-opportunities. This event will be for informational purposes only. 
Attendance is not a prerequisite for submitting a concept paper or 
application.
    Competition Information: Once the open competition has been 
announced, further information may be found at https://www.nist.gov/chips/chips-RD-funding-opportunities.
    System for Award Management: In anticipation of the NOFO, CHIPS R&D 
encourages potential applicants to complete the following steps, which 
are required to submit applications for Federal assistance:
     Register with the System for Award Management (SAM) at 
https://www.sam.gov. CHIPS R&D strongly encourages applicants to 
register for SAM.gov as early as possible. While this process 
ordinarily takes between three days and two weeks, in some 
circumstances it can take six or more months to complete due to 
information verification requirements. Recipients will be required to 
maintain an active registration in SAM and re-validate registration 
annually.
     Register for a Grants.gov (https://www.grants.gov/) 
account. It is advisable also to go to ``manage subscriptions'' on 
Grants.gov and sign up to receive automatic updates when amendments to 
a funding opportunity are posted.
    Disclaimer. This NOI does not constitute a solicitation. No 
applications may be submitted in response to this NOI. Any 
inconsistency between information within this NOI and the eventual NOFO 
announcing the CHIPS NAPMP Materials and Substrates award competition 
shall be resolved in favor of the NOFO.
    Authority. DOC CHIPS activities were authorized by Title XCIX--
Creating Helpful Incentives to Produce Semiconductors for America of 
the William M. (Mac) Thornberry National Defense Authorization Act for 
Fiscal Year 2021 (Pub. L. 116-283, often referred to as the CHIPS Act).

Tamiko Ford,
NIST Executive Secretariat.
[FR Doc. 2024-02026 Filed 1-31-24; 8:45 am]
BILLING CODE 3510-13-P