[Congressional Record Volume 171, Number 123 (Thursday, July 17, 2025)]
[Extensions of Remarks]
[Pages E686-E687]
From the Congressional Record Online through the Government Publishing Office [www.gpo.gov]
DEPARTMENT OF DEFENSE APPROPRIATIONS ACT, 2026
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speech of
HON. DARREN SOTO
of florida
in the house of representatives
Wednesday, July 16, 2025
Mr. SOTO. Mr. Chair, I want to commend the managers of the House
Department of Defense Fiscal Year 2026 Appropriations bill for
including my amendment, No. 269, to provide a $24.1 million increase
within the RDT&E-Defense Wide Account, to the Industrial Base Analysis
and Sustainment Program's (IBAS) Fan-Out Wafer level packaging program
in the en bloc package.
Semiconductors support nearly all Department of Defense (DoD)
activities. Ensuring secure access to leading-edge semiconductors,
however, is a challenge. The pandemic exposed the challenges associated
with the global supply chain, the changing global semiconductor
industry, and the sophistication of U.S. adversaries, who might target
military electronic components.
IBAS is dedicated to ensuring that the DoD is positioned to
effectively address industrial base issues and support the National
Security Innovation Base. This includes strengthening and protecting
the domestic semiconductor supply chain to provide access to leading-
edge capabilities to accelerate innovation. One of the next generation
semiconductor technologies that IBAS is focusing on is called Advanced
Packing.
Advanced Packaging essentially removes the green circuit board, and
connects each component chip onto each other, like how individual Lego
pieces can be stacked on top of each other to form a Lego set. This
next generation process fully integrates all component chips into a
single, advanced packaged, chip. Currently, 98 percent of these
advanced packaging, integrated processes, are done in Asia, where
foreign entities can insert malicious processes into these integrated
chips in a way that is not easily identifiable. IBAS is working to
provide secure, credible, and reliable domestic advanced packaged
semiconductor manufacturing capability.
Fanout wafer level packaging technology is a critical leading-edge
advanced packaging technology, providing a high degree of size, weight,
and power performance improvements over traditional packaging
processes. My amendment will allow the DoD to leverage existing public-
private-partnerships to quickly expand domestic U.S. based
semiconductor manufacturing development platforms for critical advanced
semiconductor system integration, including fan-out wafer level
packaging technology.
U.S. global leadership in semiconductors depends on U.S. owned firms
operating at the leading-edge of advanced packaging technologies. The
next generation of electronic devices will require significantly
greater functional density, in other words, packing chips together even
more tightly than current technology allows. This requires technical
leadership in semiconductor advanced packaging
[[Page E687]]
processes, including fanout wafer level packaging.
I believe Congress should continue to provide the resources necessary
to update our domestic microelectronics security framework. I am proud
of the work being undertaken in my district's semiconductor technology
district, known as NeoCity, to support domestic semiconductor
manufacturing technology development as we work to address this
critical supply chain. I look forward to continuing to work with my
colleagues to support this goal.
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